Silicon Valley Watcher - Former FT journalist Tom Foremski reporting from the intersection of technology and media

Super-Fast Energy-Saving Memory Chip Breakthrough Will Change Computing

Posted by Tom Foremski - July 29, 2015

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We will all be using a new type of memory chip soon reports Intel Free Press, thanks to the fruits of a partnership between Intel and Micron.

By Intel Free Press

After years of research by Intel and Micron Technology, the first new memory technology in 25 years has been announced. Called 3D XPoint it combines the best of DRAM and NAND (Flash) and promises to change computer designs.

"This has no predecessor and there was nothing to base it on," said Al Fazio, Intel senior fellow and director of Memory Technology Development. "It's new materials, new process architecture, new design, new testing. We're going into some existing applications, but it's really intended to completely evolve how it's used in computing."

Memory and storage technologies such as DRAM and NAND (Flash) have been around for decades, and their [performance has gradually increased with each generation. Quantum leaps in performance are extremely rare but the 3D XPoint technology announced by Intel in partnership with Micron has been called the biggest memory breakthrough since the introduction of NAND in 1989.

It is non-volatile like NAND Flash memory but is up to 1,000 times faster, almost as fast as DRAM and lasts 1,000 times longer.

3D XPoint owes its performance and name to a transistor-less three-dimensional circuit of columnar memory cells and selectors connected by horizontal wires. This "cross point" checkerboard structure allows memory cells to be addressed individually. This enables data to be written and read in smaller blocks than NAND, resulting in faster and more efficient read/write processes.

Changing game technology...

Removing bottlenecks in a system is key to increase overall performance. Memory has been a constant constraint because performance gains in microprocessors have outpaced both the speed of hard disks and the cost and density of DRAM.

"What's exciting about the technology is that it unleashes the microprocessor. It gets more data closer to the CPU. It has 10 times the density of DRAM at near levels of performance, and it allows people running applications to have much more data available to them," said Rob Crooke, vice president and general manager of Intel's Non-Volatile Memory Solutions group.

"Conversely in the storage, it's up to 1000 times faster than NAND. To put that in perspective, most people have experienced an SSD versus a hard disk, where the SSD is about 1,000 times faster than a hard disk. This new technology is going to be that same level of pop like everything's in memory."

"We've looked at gaming performance, and it has a phenomenal impact and gives the game creators much more freedom," explained Crooke.

"As opposed to constraining their game levels to how much they can fit in memory and then loading a new level, they now have total freedom to create a much richer game experience and one that's seamless and continuous, and they can decide if they want to break it up. It's at their artistic and creative discretion to do that, as opposed to some physical limit like memory size."

Made for big data...

"It'll be a game-changing experience not only in the client platforms but also in the data center where they're trying to analyze remarkable amounts of big data," Crooke continued. "More and more data needs to be driven to the CPU to analyze faster. Having much more data available to the CPU at a very short latency is pretty exciting."

Intel and Micron partnership

Micron and Intel have been jointly developing this technology since 2012. There was, however, basic research on various technologies at both companies for years prior to this partnership. The research team could have tried an easier route--committing to performance and density, or performance and cost, for example--but "if you want to change something, you've really got to go for that tougher problem and tie them all together," Fazio explained.

In 2012, Micron and Intel agreed to jointly pursue the most promising technologies from the research findings. Hundreds of Intel and Micron engineers have been involved in developing the technology to its current state, spanning facilities in California, Idaho and around the world. Over the last three years, the process development for this technology occurred in Micron's state of the art 300mm R&D facility in Boise, Idaho.

"Nobody has ever attempted productizing a stackable cross point architecture at these densities. Learning the characteristics and developing the integration methods for this novel architecture was full of engineering challenges," said Scott DeBoer, vice president of R&D at Micron.

"3D XPoint technology required the development of a number of innovative films and materials, some of which have never before been used in semiconductor manufacturing. Understanding the characteristics and sensitivities of these new materials and how to enable them was daunting."

3D XPoint, NAND and DRAM

While 3D XPoint may have capabilities that can displace DRAM and NAND, DeBoer noted that it's an additive technology that will co-exist with current solutions while also enabling new innovations. "DRAM will still be the best technology for most demanding highest performance applications, where non-volatility, cost and capacity are less critical. 3D NAND will still be the best technology for absolute lowest cost, where performance metrics is less critical."

What could be a significant factor in these different memory solutions co-existing is that they can all share manufacturing facilities.

"This technology is fabricated using the same manufacturing lines and methods as conventional memory technologies," said DeBoer.

"With the cross point architecture and the materials systems required for the new cell technology, some unique tooling was developed, but these requirements are on par with standard technology node introductions for NAND or DRAM. This technology is fully compatible and not disruptive to current manufacturing lines."

Scalable architecture...

The future of this technology looks wide-open too. "The cross point memory cell should be the most scalable architecture," said Crooke. "It should allow us to scale the memory technology to pretty good densities yet allow it to be byte-addressable or word-addressable like memory is, as opposed to NAND, which is accessed in blocks of data."

New models of computing...

A technological solution that paves the way for new models of computing doesn't come by very often. It took teams of hundreds of experts, countless flights, and constant open lines of communication and cooperation to bring make 3D XPoint technology possible.

"Entirely new technologies don't come around very often, and to be part of this team was truly a once-in-a-career opportunity," said DeBoer.

"One of the things that we should be proud of is the persistence we've had over a long period of time," Crooke added. "Working on a technology problem that you don't know is solvable for a sustained period of time requires a level of confidence and stick-to-it-iveness."

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Chris Preimesberger at eWeek has a great analysis of the new memory chips: 

Intel, Micron's New Baby Could Eventually Speed Up Most IT

If these chips work as well as advertised, big data-type systems with large workloads will be lining up to use them. The companies are positioning 3D Xpoint not as a replacement for NAND flash storage or standard random access memory, but as a complement to them to hold so-called "hot" data—the most recent and relevant data—nearer to processors so that it can be accessed faster.

. . .

Bill Leszinske, an Intel vice-president who runs strategic planning and business development for the company's Non-Volatile Solutions Group, told eWEEK that there is a wide range of early use cases for the new memory chip.

"One is cloud service providers with data centers who understand the workloads very well, that have real storage and performance problems, or are trying to build huge arrays to do things like genomic analysis," Leszinske said. "Other early adopters will be the HPC (high-performance computing) or cloud folks who are trying to do faster transactions and need a way to move data in and out very, very quickly.

"That's on the data center side. On the client side, gamers always want more performance, and we see that as a real application of these very high-speed solutions."
. . .

As far as improving data movement from servers to storage, which has been a historic problem in IT, Leszinske noted that the entire industry is moving storage connections from SATA (serial ATA) controllers to solid-state PCIe devices, and that it works hand-in-hand with the capabilities of 3D Xpoint...

PCIe-based flash storage has the ability to bypass traditional storage overhead by reducing latencies, increasing throughput and enabling efficient processing of massive quantities of data.

 

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