The New York Times reports that on Monday Intel will demonstrate a computer chip with 80 separate cores.

While the chip is not compatible with Intel’s current chips, the company said it had already begun design work on a commercial version that would essentially have dozens or even hundreds of Intel-compatible microprocessors laid out in a tiled pattern on a single chip.

The chip’s design is meant to exploit a new generation of manufacturing technology the company introduced last month. Intel said that it had changed the basic design of transistors in such a way that it would be able to continue to shrink them to smaller sizes — offering lower power and higher speeds — for at least a half-decade or more.

During a briefing on Thursday in a hotel room here, Nitin Borkar, one of the chip’s designers, showed an air-cooled computer based on the chip running a simple scientific calculation at speeds above one trillion mathematical calculations a second.

During the demonstration, Justin R. Rattner, the company’s chief technology officer, showed several futuristic computing applications that he said the new chip design would help make possible. One of the applications was an automated video editing tool that would, for example, allow a computer to create a digital sports highlights video featuring a user’s favorite players.

A second demonstration showed motion capture technology — a technique widely used by the videogame industry to reproduce human forms in action — relying only on digital video cameras and computers. Conventional motion capture technology requires a complex array of sensors pinned to an actor’s body and face to record a digital video that can be used interactively.

The shift toward systems with hundreds or even thousands of computing cores is both an opportunity and a potential crisis, computer scientists said, because no one has proved how to program such chips for many applications.

“If we can figure out how to program thousands of cores on a chip, the future looks rosy,” said David A. Patterson, a University of California, Berkeley computer scientist who is a co-author of one of the standard textbooks on microprocessor design. “If we can’t figure it out, then things look dark.”

During the briefing last week Mr. Rattner essentially endorsed the Berkeley view, saying that the company believed that its Teraflop chip was the best way to solve a set of computing problems he described as “recognition, mining and synthesis,” computing techniques that use artificial intelligence.

In addition to new kinds of computing applications, Mr. Rattner said that the so-called network-on-chip Teraflop processor would be ideal for the kind of heterogeneous computing that is increasingly common in the corporate world.

One of the most impressive technical achievements made by the Intel researchers was the speed with which they are able to move data among the separate processors on the chip, Mr. Patterson said.

The Teraflop chip, which consumes just 62 watts at teraflop speeds and which is air-cooled, contains an internal data packet router in each processor tile. It is able to move data among tiles in as little as 1.25 nanoseconds, making it possible to transfer 80 billion bytes a second among the internal cores.